The present invention relates to semiconductor devices and more particularly to technology useful for semiconductor devices including a plurality of semiconductor chips.
To produce a semiconductor device with a plurality of semiconductor chips mounted on a substrate like an SoC (System on Chip), a larger substrate is required than when a single semiconductor chip is mounted on a substrate. However, increasing the thickness of the substrate depending on the area of the substrate brings disadvantages in the process of making through holes.
On the other hand, if the area of the substrate is increased without an increase in its thickness, warpage or deformation is likely to occur in the semiconductor device. One reason for such warpage or deformation lies in the heating or cooling step of the semiconductor device manufacturing process. Specifically, the substrate included in the semiconductor device, semiconductor chips, resin for sealing the semiconductor chips on the substrate, and lid for covering the semiconductor chips have different thermal expansion coefficients, so deformation may occur during heating or cooling.
If warpage or deformation occurs in the semiconductor device, it may be difficult or impossible to mount the semiconductor device on the wiring substrate. Particularly, if the semiconductor device is mounted through a ball grid array (BGA) provided on the back surface of the semiconductor device, some of the solder balls of the BGA might fail to reach the wiring board due to warpage or deformation.
Japanese Unexamined Patent Publication No. 2000-196008 discloses a multichip semiconductor device. In this multichip semiconductor device, three or more semiconductor chips are disposed over one surface of a quadrangular substrate with a conductor layer in a planar manner and electrically coupled to the conductor layer. In this multichip semiconductor device, a ball grid array including a plurality of electrodes for coupling the conductor layer to the outside electrically is formed over the other surface of the substrate. In this multichip semiconductor device, at least one semiconductor chip lies over each of the two centerlines which couple the middle points of opposite sides of the substrate.
Japanese Unexamined Patent Publication No. 2008-251731 discloses a semiconductor device. This semiconductor device includes a plurality of semiconductor chips and a virtually rectangular circuit substrate and has an MCM package structure. In the MCM package structure, a plurality of semiconductor chips are disposed in parallel over a semiconductor chip mounting surface of the circuit substrate for mounting a plurality of semiconductor chips and the semiconductor chip mounting surface is covered by sealing resin along the outer edge of the circuit substrate to seal the semiconductor chips. The semiconductor device includes a semiconductor chip which lies across the centerline where the longitudinal-division plane bisecting the semiconductor chip mounting surface in the long-side direction intersects the transverse-division plane bisecting the semiconductor chip mounting surface in the short-side direction. In this semiconductor device, the above semiconductor chip in has a larger thickness than the other semiconductor chips mounted over the semiconductor chip mounting surface in a direction perpendicular to the semiconductor chip mounting surface.